sparc64: Make %pil level 15 a pseudo-NMI.
So that we can profile code even in a local_irq_disable() section,
only write 14 (instead of 15) into the %pil register to disable IRQs.
This allows PIL level 15 to serve as a pseudo NMI.
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/arch/sparc64/kernel/cherrs.S b/arch/sparc64/kernel/cherrs.S
index 89afebd..4ee1ad4 100644
--- a/arch/sparc64/kernel/cherrs.S
+++ b/arch/sparc64/kernel/cherrs.S
@@ -102,7 +102,7 @@
.type do_cheetah_plus_data_parity,#function
do_cheetah_plus_data_parity:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -144,7 +144,7 @@
.type do_cheetah_plus_insn_parity,#function
do_cheetah_plus_insn_parity:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -492,7 +492,7 @@
.type c_fast_ecc,#function
c_fast_ecc:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -528,7 +528,7 @@
.type c_cee,#function
c_cee:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -564,7 +564,7 @@
.type c_deferred,#function
c_deferred:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index 353226f..45830c3 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -706,7 +706,7 @@
andn %l0, PSTATE_IE, %o1
wrpr %o1, 0x0, %pstate
rdpr %pil, %l1
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
/* Make the firmware call to jump over to the Linux trap table. */
sethi %hi(is_sun4v), %o0
diff --git a/arch/sparc64/kernel/hvtramp.S b/arch/sparc64/kernel/hvtramp.S
index 0236c43..9365432 100644
--- a/arch/sparc64/kernel/hvtramp.S
+++ b/arch/sparc64/kernel/hvtramp.S
@@ -1,6 +1,6 @@
/* hvtramp.S: Hypervisor start-cpu trampoline code.
*
- * Copyright (C) 2007 David S. Miller <davem@davemloft.net>
+ * Copyright (C) 2007, 2008 David S. Miller <davem@davemloft.net>
*/
#include <linux/init.h>
@@ -14,6 +14,7 @@
#include <asm/ptrace.h>
#include <asm/head.h>
#include <asm/asi.h>
+#include <asm/pil.h>
__CPUINIT
.align 8
@@ -32,7 +33,7 @@
*/
hv_cpu_startup:
SET_GL(0)
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
wrpr %g0, 0, %canrestore
wrpr %g0, 0, %otherwin
wrpr %g0, 6, %cansave
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index c6d0636..b5225c8 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -1146,8 +1146,8 @@
}
}
-/* Imprisoned penguins run with %pil == 15, but PSTATE_IE set, so they
- * can service tlb flush xcalls...
+/* Imprisoned penguins run with %pil == PIL_NORMAL_MAX, but PSTATE_IE
+ * set, so they can service tlb flush xcalls...
*/
extern void prom_world(int);
diff --git a/arch/sparc64/kernel/spiterrs.S b/arch/sparc64/kernel/spiterrs.S
index ef902c6..c357e40 100644
--- a/arch/sparc64/kernel/spiterrs.S
+++ b/arch/sparc64/kernel/spiterrs.S
@@ -80,7 +80,7 @@
cmp %g2, 1
rdpr %pil, %g2
bleu,pt %xcc, 1f
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etraptl1
rd %pc, %g7
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S
index e2f8e1b..559bc5e 100644
--- a/arch/sparc64/kernel/sun4v_ivec.S
+++ b/arch/sparc64/kernel/sun4v_ivec.S
@@ -186,7 +186,7 @@
* when it's done.
*/
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
mov %g1, %g4
ba,pt %xcc, etrap_irq
rd %pc, %g7
@@ -216,7 +216,7 @@
membar #Sync
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -297,7 +297,7 @@
* when it's done.
*/
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
mov %g1, %g4
ba,pt %xcc, etrap_irq
rd %pc, %g7
@@ -327,7 +327,7 @@
membar #Sync
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c
index 04994fc..4638af2 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc64/kernel/traps.c
@@ -1832,7 +1832,7 @@
}
}
-/* We run with %pil set to 15 and PSTATE_IE enabled in %pstate.
+/* We run with %pil set to PIL_NORMAL_MAX and PSTATE_IE enabled in %pstate.
* Log the event and clear the first word of the entry.
*/
void sun4v_resum_error(struct pt_regs *regs, unsigned long offset)
@@ -1880,7 +1880,7 @@
atomic_inc(&sun4v_resum_oflow_cnt);
}
-/* We run with %pil set to 15 and PSTATE_IE enabled in %pstate.
+/* We run with %pil set to PIL_NORMAL_MAX and PSTATE_IE enabled in %pstate.
* Log the event, clear the first word of the entry, and die.
*/
void sun4v_nonresum_error(struct pt_regs *regs, unsigned long offset)
diff --git a/arch/sparc64/kernel/ttable.S b/arch/sparc64/kernel/ttable.S
index 2a31ffa..ea92550 100644
--- a/arch/sparc64/kernel/ttable.S
+++ b/arch/sparc64/kernel/ttable.S
@@ -66,7 +66,7 @@
tl0_irq7: BTRAP(0x47) BTRAP(0x48) BTRAP(0x49)
tl0_irq10: BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d)
tl0_irq14: TRAP_IRQ(timer_interrupt, 14)
-tl0_irq15: TRAP_IRQ(perfctr_irq, 15)
+tl0_irq15: TRAP_NMI_IRQ(perfctr_irq, 15)
tl0_resv050: BTRAP(0x50) BTRAP(0x51) BTRAP(0x52) BTRAP(0x53) BTRAP(0x54) BTRAP(0x55)
tl0_resv056: BTRAP(0x56) BTRAP(0x57) BTRAP(0x58) BTRAP(0x59) BTRAP(0x5a) BTRAP(0x5b)
tl0_resv05c: BTRAP(0x5c) BTRAP(0x5d) BTRAP(0x5e) BTRAP(0x5f)
