tree 538f1564b70d017b224a423d99bc2a0366c1f745
parent b93b2abce497873be97d765b848e0a955d29f200
author David Daney <ddaney@caviumnetworks.com> 1286492620 -0700
committer Ralf Baechle <ralf@linux-mips.org> 1288375713 +0100

MIPS: Octeon: Update register definitions for CN63XX chips

The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores.

Join some lines back together.  This makes some of them exceed 80
columns, but they are uninteresting and this unclutters things.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>