tree e55e3f1a8ba2f1dee33a3d189061027e34fd4c15
parent bb3c9d4f851d51bb6302ef0df830dcec88d7c529
author Anders Larsen <al@alarsen.net> 1270723696 +0100
committer Russell King <rmk+kernel@arm.linux.org.uk> 1270798264 +0100

ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lock

at91 slow-clock resume: Don't wait for a disabled PLL to lock.

We run into this problem with the PLLB on the at91: ohci-at91 disables
the PLLB when going to suspend. The slowclock code however tries to do
the same: It saves the PLLB register value and when restoring the value
during resume, it waits for the PLLB to lock again. However the PLL will
never lock and the loop would run into its timeout because the slowclock
code just stored and restored an empty register.
This fixes the problem by only restoring PLLA/PLLB when they were enabled
at suspend time.

Cc: Andrew Victor <avictor.za@gmail.com>
Signed-off-by: Anders Larsen <al@alarsen.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>