[PARISC] Optimize TLB flush on SMP systems

Signed-off-by: Randolph Chung <tausq@debian.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index f662e83..67b3814 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -39,21 +39,19 @@
  * etc. do not do that).
  */
 
+static inline void __flush_tlb_mm(void *mmv)
+{
+	struct mm_struct *mm = (struct mm_struct *)mmv;
+	if (mm == current->active_mm)
+		load_context(mm->context);
+}
+
 static inline void flush_tlb_mm(struct mm_struct *mm)
 {
-	BUG_ON(mm == &init_mm); /* Should never happen */
-
-#ifdef CONFIG_SMP
-	flush_tlb_all();
-#else
-	if (mm) {
-		if (mm->context != 0)
-			free_sid(mm->context);
-		mm->context = alloc_sid();
-		if (mm == current->active_mm)
-			load_context(mm->context);
-	}
-#endif
+	if (mm->context != 0)
+		free_sid(mm->context);
+	mm->context = alloc_sid();
+	on_each_cpu(__flush_tlb_mm, mm, 1, 1);
 }
 
 extern __inline__ void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end)