tree e9b56a844a07f9664a528471f6db2536bf370208
parent 231a35d37293ab88d325a9cb94e5474c156282c0
author Ralf Baechle <ralf@linux-mips.org> 1201601699 +0000
committer Ralf Baechle <ralf@linux-mips.org> 1201601699 +0000

[MIPS] Extend performance counter event field.

The latest draft version of the MIPS Architecture Specification extends the
6 bit event field by adding a directly adjacent 4-bit EventExt field for a
total of 10 bits.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>