tree bd9aa8ff8f72cf6cbd109e5bf0c2206ef2374bd3
parent aaf697e4e02bf6f7dd6105877bc58ebdbf612d66
author Joerg Roedel <joerg.roedel@amd.com> 1208358065 +0200
committer Avi Kivity <avi@qumranet.com> 1209309704 +0300

KVM: SVM: remove selective CR0 comment

There is not selective cr0 intercept bug. The code in the comment sets the
CR0.PG bit. But KVM sets the CR4.PG bit for SVM always to implement the paged
real mode. So the 'mov %eax,%cr0' instruction does not change the CR0.PG bit.
Selective CR0 intercepts only occur when a bit is actually changed. So its the
right behavior that there is no intercept on this instruction.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>