[ARM] 4201/1: SMP barriers pair needed for the secondary boot process
In some situations, the pen_release store in platform_secondary_init()
may stay forever in the write buffer while the CPU is waiting on the
boot_lock to be released in boot_secondary(). The primary CPU could
never see the pen_release update without the barriers.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 709a9b1..fce3596 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -59,6 +59,7 @@
* pen, then head off into the C entry point
*/
pen_release = -1;
+ smp_wmb();
/*
* Synchronise with the boot thread.
@@ -102,6 +103,7 @@
timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) {
+ smp_rmb();
if (pen_release == -1)
break;
